电源控制（PWR)

本篇总结

使用 PWR，演示 PVD 可编程电压监测器，VDD 跨越阈值时通过 EXTI_Line16 中断打印告警。

硬件平台：本例程基于 W55MH32L-EVB 开发板运行。

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上升沿与下降沿

同一级别的上升沿阈值比下降沿高约 0.1V（迟滞），避免 VDD 在阈值附近抖动时频繁触发中断。通过 PWR_PVDLevelConfig(PWR_PVDLevel_2V9) 选择级别 7（典型 2.88V）。

int main(void)
{
    RCC_ClocksTypeDef clocks;

    delay_init();
    UART_Configuration(115200);
    RCC_GetClocksFreq(&clocks);

    printf("\n");
    printf("SYSCLK: %3.1fMhz, HCLK: %3.1fMhz, PCLK1: %3.1fMhz, PCLK2: %3.1fMhz, ADCCLK: %3.1fMhz\n",
           (float)clocks.SYSCLK_Frequency / 1000000, (float)clocks.HCLK_Frequency / 1000000,
           (float)clocks.PCLK1_Frequency / 1000000, (float)clocks.PCLK2_Frequency / 1000000,
           (float)clocks.ADCCLK_Frequency / 1000000);

    printf("PWR PVD Test.\n");

    PVD_Configuration();
    while (1);
}

/* PVD 配置 */
void PVD_Configuration(void)
{
    EXTI_InitTypeDef EXTI_InitStructure;
    NVIC_InitTypeDef NVIC_InitStructure;

    RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);

    /* EXTI_Line16 = PVD，上升沿+下降沿触发 */
    EXTI_ClearITPendingBit(EXTI_Line16);
    EXTI_InitStructure.EXTI_Line    = EXTI_Line16;
    EXTI_InitStructure.EXTI_Mode    = EXTI_Mode_Interrupt;
    EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
    EXTI_InitStructure.EXTI_LineCmd = ENABLE;
    EXTI_Init(&EXTI_InitStructure);

    NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);

    /* PVD 中断最高优先级 */
    NVIC_InitStructure.NVIC_IRQChannel                   = PVD_IRQn;
    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
    NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 0;
    NVIC_InitStructure.NVIC_IRQChannelCmd                = ENABLE;
    NVIC_Init(&NVIC_InitStructure);

    /* 阈值 2.9V 并使能 */
    PWR_PVDLevelConfig(PWR_PVDLevel_2V9);
    PWR_PVDCmd(ENABLE);
}

/* PVD 中断服务函数 */
void PVD_IRQHandler(void)
{
    if (EXTI_GetITStatus(EXTI_Line16) != RESET)
    {
        if (PWR_GetFlagStatus(PWR_FLAG_PVDO) == SET)
            printf("VDD Below the selected PVD threshold\n");
        else
            printf("VDD Above the selected PVD threshold\n");

        EXTI_ClearITPendingBit(EXTI_Line16);
    }
}

轮询方式

若不想用中断，可在主循环中轮询：if (PWR_GetFlagStatus(PWR_FLAG_PVDO) == SET) printf("欠压");，每秒检查一次即可。

SYSCLK: 72.0Mhz, HCLK: 72.0Mhz, PCLK1: 36.0Mhz, PCLK2: 72.0Mhz, ADCCLK: 36.0Mhz

PWR PVD Test.

VDD Below the selected PVD threshold

VDD Above the selected PVD threshold